An increasing amount of cities are trying to increase civic engagement by using digital tools and platforms which gather data in a variety of ways on relevant topics within the city. Tools and platforms that focus on handling easy to fix issues on a local scale such as broken streetlights have been successfully implemented in cities already. In this paper a case study is described which aimed to retrieve data from citizens about a more complex local challenge in a neighborhood in Amsterdam. Furthermore, it has been investigated how the municipality could use the collected data as input for policy making. By making a participatory mapping mobile phone application available in a neighborhood, data was collected about places in the neighborhoods public space in which the citizens took pride and places that needed attention. This data is to be used as input for the area plan of the neighborhood. A first case-study with the application showed that even though there was low participation from the neighborhood, due to the high quality of the added data it was still valuable for the municipality.
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Citizen participation is booming, especially the number of urban bottom-up initiatives where information and communication technologies (ICT) are deployed is increasing rapidly. This growth is good news for society as recent historical research shows that the more citizens actively and persistently interfere with public issues, the more likely a society will be resilient. And yet, at the same time, a growing number of scholars argue that due to the unprecedented impact of ICT, the public sphere is at stake. How to understand both trends? How do the anti-‘public sphere’ developments relate to the growing number of citizens’ initiatives using ICT? And if these citizen initiatives can indeed be understood as manifestations of public spheres, how can ICT foster or hinder the development of these public spheres? These questions will be explored by analyzing a Dutch citizen initiative called ‘Buuv’ (an online ‘market’ place for and by local residents) from a ‘public sphere’ perspective. The author will turn to The human condition (1958) of Hannah Arendt in order to elaborate a ‘public sphere’ perspective. An Arendtian perspective (as any perspective) highlights, however, some aspects and underexposes other aspects. Furthermore, chances are that Arendt’s thoughts are somewhat outdated, in the sense that we now live in a world where the online and the offline life intertwine — an experience that is referred to with the term ‘onlife’. Bearing these remarks in mind, the author will elaborate on the value of Arendt’s ideas to 1) the endeavor of understanding current trends in society—more urban bottom-up initiatives and anti-‘public sphere’ developments due to the broad uptake of ICT—and 2) the endeavor of revitalizing the public sphere in an onlife world. IEEE copyright
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Neighborhood image processing operations on Field Programmable Gate Array (FPGA) are considered as memory intensive operations. A large memory bandwidth is required to transfer the required pixel data from external memory to the processing unit. On-chip image buffers are employed to reduce this data transfer rate. Conventional image buffers, implemented either by using FPGA logic resources or embedded memories are resource inefficient. They exhaust the limited FPGA resources quickly. Consequently, hardware implementation of neighborhood operations becomes expensive, and integrating them in resource constrained devices becomes unfeasible. This paper presents a resource efficient FPGA based on-chip buffer architecture. The proposed architecture utilizes full capacity of a single Xilinx BlockRAM (BRAM36 primitive) for storing multiple rows of input image. To get multiple pixels/clock in a user defined scan order, an efficient duty-cycle based memory accessing technique is coupled with a customized addressing circuitry. This accessing technique exploits switching capabilities of BRAM to read 4 pixels in a single clock cycle without degrading system frequency. The addressing circuitry provides multiple pixels/clock in any user defined scan order to implement a wide range of neighborhood operations. With the saving of 83% BRAM resources, the buffer architecture operates at 278 MHz on Xilinx Artix-7 FPGA with an efficiency of 1.3 clock/pixel. It is thus capable to fulfill real time image processing requirements for HD image resolution (1080 × 1920) @103 fcps.
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